NetBSD/emips

About NetBSD/emips

NetBSD/emips runs on the Extensible MIPS architecture developed at Microsoft Research. The architecture has the capability of dynamically loading and scheduling accelerated CPU extension instructions to match the workload.

All components of eMIPS are public source, including the CPU and peripherals.

NetBSD/emips News

2011-01-26: Initial commit: NetBSD/emips support is initially committed to the NetBSD source tree.

2010-12-20: eMIPS port published on research.microsoft.com: The original eMIPS source and binaries for NetBSD 4.0.1 offered for download from research.microsoft.com.

Supported System Models

Currently the following models are supported in NetBSD/emips:

Xilinx ML401/2 dev boards, with Virtex V4 FPGAs
Xilinx XUP dev board, with Virtex V5 FPGAs
BEE3 system from BeeCube, with four Virtex V5 FPGAs
Microsoft Giano full-system simulator

NetBSD/emips Information

Hardware and Giano instructions, an excerpt from MSR-TR-2010-169 (see below for link to full doc).
MSR tech report "An online scheduler for hardware accelerators on general-purpose operating systems"
The NetBSD Diskless HOWTO

Mailing Lists

The NetBSD/mips mailing list, covering all of the MIPS-based NetBSD ports:
[ subscribe | archive ]